Photo Courtesy of Vijay Sontakke

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The semiconductor industry is experiencing rapid growth, driven by increasing demand for computers, automobiles, mobile phones, artificial intelligence, and 5G/6G networks. As modern society and the economy continue to evolve, semiconductor Integrated Circuits (IC), commonly known as chips, have become essential components driving innovation. 

In 2023, the global semiconductor market revenue was $526.9 billion, and the market is predicted to grow even more in the coming years. However, with this rapid expansion comes significant challenges, particularly in chip testing. Defects can occur in every step of the chip manufacturing process. 

Vijay Sontakke, who works at Intel Corporation as a design engineer, has emerged as a key contributor to the field of semiconductor testing. He has 24 years of experience in semiconductor testing. His exceptional contributions to the semiconductor testing field were recognized with a 2024 Global Recognition Award.

Sontakke’s work bridges theoretical advancements with practical applications. His strategy has positioned him as a respected figure in the semiconductor testing industry. “The semiconductor industry requires solving complex problems with practical solutions,” he states, reflecting his philosophy.

Semiconductor manufacturing adopts advanced technologies from time to time to meet increased demands. Manufacturers strive to create smaller, more energy-efficient, and environmentally sustainable chips. 

“Deploying defective chips into the market can lead to serious consequences, including system crashes, data loss, privacy breaches, and infrastructure paralysis, which would be catastrophic for individuals, businesses, and governments,” the IEEE Senior Member says. 

Designing testability features requires in-depth knowledge of probable defects occurrence, methodologies that can be used for their detection, and the latest support available from electronic design automation (EDA) tools. He has applied his expertise in adding test features, including scan, memory built-in self test (MBIST), and boundary scan in chips, to address challenges faced in testing them.

Professional experience and career growth

Sontakke earned his bachelor’s degree in electronics in 1997 and a master’s degree in the same subject in 1999. During his bachelor’s and master’s studies, Sontakke always doubted how the output of a circuit designed in the laboratory would be correct when the chip itself had broken connections inside it. This curiosity led him to choose the design for test (DFT) domain when he started his first job at Motorola in the year 2000. He says, “It was like a dream coming true when I started designing various test features for the mobile phone chip.” 

Earlier in his career, Sontakke also worked for Ikanos and AMD, both highly reputed US-based companies. He designed integrated circuits (IC) using cutting-edge technologies at that time. He continuously learned how newer defects occur when IC is manufactured with newer technologies. 

For example, at Motorola, he developed a test methodology for 90nm manufacturing technology, which was recent at that time. He worked at different companies designing test features for their ICs. He has participated in the development of 16 chips, which generated billions of dollars in revenue for the companies. These chips are used in diverse applications like 2G/3G mobile phones (Motorola), broadband access ADSL/VDSL/PON/Set-top-box (Ikanos), and laptop and desktop microprocessors (Intel, AMD). These chips were large in size, having transistors ranging from a few million to 4.8 billion. “It is important to check whether each of these transistors is manufactured correctly and connected to each other as intended,” he says.   

Moving to newer manufacturing technologies for fabricating chips offers many benefits like small chip size, fitting more functions, and speed of operation. However, such a move brings challenges for testing ICs itself, requiring new methodologies. That was Sontakke’s job when he joined Intel in 2019. Now, he is leading initiatives to develop testing methodologies for advanced manufacturing technologies and implement features in chips that facilitate testing to screen defective chips. 

Sontakke took advantage of recently supported IEEE1687 standards by electronic design automation (EDA) vendors to develop an architecture to efficiently reuse test patterns. To accelerate the development of solutions for 5G networking chips, he and his team collaborated with multiple EDA vendors in the industry. The collaboration led to a successful DFT (Design-for-Test) implementation solution that resulted in the design of a 5G networking chip without a single bug. 

Career achievements and advancements

For his contributions at Intel, Sontakke received more than 10 recognitions, including an award from the Intel CEO in 2021. “My job has evolved significantly over the years,” he reflects. “Initially, I was working on designing test features as an individual contributor, then I transitioned into a leadership role, guiding teams and collaborating with other IC design departments to incorporate their requirements.” 

To develop the skills to act as an interface between engineers and business-focused teams requires hard work, which is something Sontakke is familiar with. As a senior staff design engineer, he led, managed, and contributed to designing and developing DFT methodologies for several chips during his 6-year tenure at Ikanos. During his time as manager at AMD, he led teams for the development of AMD’s 6th generation microprocessor for laptops and desktops.

DFT implementation and verification are critical in semiconductor chip design. It requires specialized skills. Many organizations face a shortage of experienced engineers due to budget constraints. Knowing this, Sontakke trained engineers and developed DFT skillsets across organizations. “Mentorship is an integral part of leadership as developing skillsets among younger engineers increases the team’s productivity. It also nurtures a collaborative environment that encourages innovation and learning”, he explained. For the past 15 years, he has mentored several engineers across organizations and continues this effort at Intel.

Research and knowledge sharing

With the tremendous growth in digital transformation in the last 3 decades, the energy sector is facing a serious challenge to supply enough power to IT infrastructures, for example, data centers. Inspired by the aim of reducing energy requirements for IC operations, Sontakke performed research on low-power testing solutions. He studied designing low-power scan shift and scan capture testing solutions in chips and published his findings as two peer-reviewed papers in the Bulletin of Electrical Engineering and Informatics  and the International Journal of Electrical and Computer Engineering respectively in 2023. 

“Publishing enables knowledge sharing to lead to new ideas and progress,” he says. The papers also highlight critical challenges that need to be addressed in the future and serve as valuable resources for industry professionals seeking solutions to power-related issues in IC testing. These studies are the first dedicated analysis of power consumption during shift and capture operations. His efforts aim to create efficient and environmentally responsible technology, addressing the broader impacts of industry advancements on energy consumption. 

With shrinking technologies, the structure of on-chip memories is becoming denser. The dense structure made the nanometer memories more prone to defects. Sontakke says, “The escalating demand for reliable operation in safety-critical applications like automobile and aviation further underscores the importance of enhanced testing of memories on a chip.” He performed an in-depth analysis of the various testing strategies for nanometer memories. 

Also, to reduce the wastage of chips due to defects in memories, Sontakke researched technologies that correct a few defects in chips.  “Self-repairing technologies instantly correct faulty chips due to defects in memory circuits,” he explains. He disseminated the findings of these studies via two first-authored papers in the International Journal of Electrical and Computer Engineering in 2024.

Sontakke’s involvement in the academic community extends to serving as a Technical Program Committee Member for 14 IEEE and 9 other international conferences and journals. He also acted as a judge for the IEEE SSCS Arduino Contest and the IEEE Senior Member Application Reviews. These activities underscore his dedication to fostering creativity and contributing to the development of the electronics industry. 

As Vice Chair of the IEEE Electron Devices Society, he guides young engineers and participates in discussions about emerging technologies. He is also an active scientific paper reviewer and reviewed more than 100 papers. In 2024, he received the Outstanding Reviewer of the Year award from IEEE.

A career built on expertise and leadership

Sontakke’s professional journey demonstrates his commitment to solving industry challenges and advancing semiconductor technology. His work in adding testing features in chips, research, and mentoring continues to influence the field, providing valuable insights to engineers and professionals. Earlier this year, he was inducted as a fellow of the Institution of Electronics and Telecommunication Engineers (IETE). The recognitions he has received from various employers and professional associations underscore his role as a leader in the semiconductor industry.

With his expertise and dedication, Sontakke continues to help shape the future of semiconductor testing. Sontakke’s unique combination of academic research orientation, technical expertise, leadership capabilities, and extensive industry knowledge exemplifies the impact of innovative thinking and collaborative efforts on developing advanced technologies.