What is the Double-Pulse Test?
The double-pulse test (DPT) is the most widely adopted method for measuring the characteristics of these power semiconductors in hard-switching situations. It reveals valuable insights into the power device in dynamic conditions, giving engineers the ability to accurately gauge everything from energy losses during turn-on (Eon) and turn-off (Eoff) to current (di/dt) and voltage (dv/dt) slopes. The test can also measure reverse-recovery characteristics (Qrr) of the power device and the operation of the gate driver that controls it.
With it, power designers and systems engineers can improve the efficiency of power conversion. It also helps them identify potential performance issues early in the design process, resulting in more robust and reliable power designs.
A double-pulse test requires several pieces of equipment. A power supply or source-measurement unit (SMU) delivers the voltage, while the arbitrary function generator (AFG) or other testers output the gate-drive signals that switch the power device on and off, allowing engineers to assess how it performs under different current loads and at varying temperatures. The ability to supply accurate gate-drive signals—these are the “pulses” in double-pulse testing—is critical for conducting these tests.
By adjusting the turn-on and turn-off times, engineers can observe and analyze the switching waveforms of the power device. In most cases, a high-bandwidth mixed-signal oscilloscope is used to capture these high-speed signals, and it’s paired with several different probes to measure the gate and drain current of the power device as well as perform isolated high-side gate voltage measurements. That data is critical for understanding how the power device performs across a range of conditions.
In a typical setup, a pair of pre-packaged power devices are placed in a half-bridge topology on an evaluation board with gate drivers and current sensors. The PCB is specifically designed for the purpose of double-pulse testing.
Testing bare power semiconductors can give engineers a more complete understanding of the switching characteristics of power devices, said Keysight. But measuring the dynamic operation of a power transistor before packaging usually requires soldering directly onto the bare chip. This process is not only difficult, but it can also cause parasitics that impact the accuracy and reliability of the measurements, according to the company.
Minimizing Parasitics of Bare Power Devices
Keysight said it takes care of these challenges with its latest test system, which allows power device engineers and systems designers to perform dynamic characterization as soon as the chip is diced from a wafer. The system facilitates the fast and easy accommodation of bare power devices, said Keysight, supplying more than enough electrical contact for testing while keeping a small and fragile chip from arcing or being damaged.
The unique design of the test fixture eliminates the need for soldering directly to the power device or the placement of needle-shaped probes on top of it. That minimizes parasitics in the test circuit and produces clean measurement waveforms for fast-switching SiC and GaN power devices. The system has parasitic power-loop inductance of less than 10 nH. “Bare chip dynamic characterization, once regarded as almost impossible to do, is now possible with the extension to our power semiconductor test portfolio,” said Goetzl.
