IITB prof’s model to test semiconductors’ reliability makes waves | Mumbai News – Times of India
semiconductor

IITB prof’s model to test semiconductors’ reliability makes waves | Mumbai News – Times of India

IITB prof's model to test semiconductors’ reliability makes waves

Mumbai: Whether it is a smartphone or a jet, therein lies a silent enabler: the semiconductor chip. Now, a name from India’s IIT Bombay has made a mark with his research on this device which powers the digital world. Professor Souvik Mahapatra, a senior faculty in the electrical engineering department, has been felicitated by his peers for the creation of the “Mahapatra Reliability Model.”
Chips, often just millimetres wide, house billions of nanoscale transistors and predicting how transistors degrade over time is an intricate science. For over two decades, Prof. Mahapatra has studied complexities of transistor reliability, helping optimise their performance, power, and longevity.
“Semiconductor chips are ubiquitous—they are the unseen engines driving our mobile phones, laptops, washing machines, and even aeroplanes,” Mahapatra said. “But their reliability—ensuring devices perform as intended over time—is paramount. Imagine your video game stalling months after purchase; reliability is what prevents that.” He said, “The degradation of transistors happens gradually, becoming significant only near the end of a product’s life.” “We use accelerated stress tests and theoretical models to predict these outcomes during the development phase. “
Chandra Mouli, vice president of Device Technology at Micron, hailed Mahapatra’s role. “His understanding of transistor wear-out mechanisms has been invaluable in assessing and mitigating lifetime degradation,” he said.
Mahapatra’s collaboration with Synopsys led to his model being integrated into the Sentaurus TCAD software for evaluating transistor reliability. Synopsys recently presented Mahapatra with an award at the International Electron Devices Meeting in San Francisco.

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